Power Semiconductors (SiC & GaN) — Market
Updated 6/14/2026
Market — Power Semiconductors (SiC & GaN)
Verified claims and product-axis read for Power Semiconductors (SiC & GaN). Every fact below is sourced; every product judgment traces back to underlying signals.
Verified facts
- Wolfspeed's 200mm wafer cost target is reportedly 50% lower per device than 150mm at maturity per management commentary. ↗ (other)
- Texas Instruments TI Aizu fab (Japan) brought GaN power production in-house in 2023 with 150mm GaN-on-Si wafers. ↗ _(historical_event)_
- Power Integrations' InnoSwitch with PowiGaN integrates GaN into a flyback controller and ranks #1 by units in fast-charger ICs since 2022. ↗ (other)
- Honda's 2026 0 Series EV announced partnership with Hitachi-Astemo for SiC inverter, with Renesas as device supplier. ↗ _(historical_event)_
- GaN-on-Si 8-inch device cost is estimated at 30-40% below 6-inch by Innoscience public statements in 2024. ↗ _(historical_event)_
- Wolfspeed had ~$8B of design-in pipeline as of Q3 FY2024 earnings, with auto >60%. ↗ (financial)
- The 800V HVDC data-center spec promoted by NVIDIA at GTC 2025 cites projected ~5% efficiency gain vs. 54V architectures. ↗ (other)
- TSMC's GaN-on-Si foundry service is rumored to be wound down by 2027 with capacity converted to other processes. ↗ (other)
- Coherent sold a 25% stake in its SiC business to DENSO and Mitsubishi Electric for $1B in 2023. ↗ (financial)
- onsemi's EliteSiC M3S 1200V MOSFET datasheet (NTHL040N120M3S) lists 40 mΩ typical RDS(on) and AEC-Q101 qualification. ↗ (other)
Cross-cutting opportunities (industry read)
- PCIe Gen5/Gen6 & CXL Retimer / Switch IC — Hyperscale AI racks need PCIe Gen5→Gen6 + CXL retimers/switches just to keep host-to-accelerator links alive at scale; this is Astera Labs' core ALAB-listed business.
- 800G / 1.6T Co-Packaged Optics & Silicon Photonics module — Scale-out beyond ~100K GPU clusters (verified Colossus class) is bandwidth-bound; pluggable optics are hitting reach/power limits, so the industry is racing to ship CPO at 800G→1.6T while still selling AEC for short reach.
- UALink AI Scale-Up Fabric (GPU-to-GPU) — NVLink lock-in is the single biggest non-NVIDIA accelerator pain point; the UALink consortium is the answer and Astera is the first merchant silicon making it ship-worthy.
See the Products and Strategy modules for the full product list and forward-looking judgment.
→ Get this data as JSONLast updated: Jun 14, 2026